Assessment of Dietary Behavior of Children Aged between 3-12 Years Suffering from Thalassemia Visiting Tertiary Care Hospitals, Lahore Dietary behavior of Thalassemia children

Thalassemia is a hereditary blood disorder passed down through families in which the body makes hemoglobin in an abnormal form. Nutritional deficiencies in thalassemia children results in anemia and other medical complications. Objective: To assess dietary behavior of children aged between 3-12 years suffering from thalassemia. Methods: A cross-sectional study was carried out in the outdoor patient department of thalassemia at Sir Ganga Ram Hospital, Lahore for 4 months.100 patients were selected through non probability sampling technique. Data was tabulated and analyzed by SPSS version 21.0. Results: Thalassemia was more prevalent in the age group of 8-12 years. Nutritional deficiencies in thalassemia patients caused anemia as it was evident from results that 74% of thalassemic children had pale skin. As far as dietary intake was concerned only 4% of thalassemia children were consuming meat and meat products.58% of thalassemia children consumed milk on daily basis. Only 8% took green leafy vegetables on daily basis as it contains high amount of iron. Micro nutrient deficiencies as vitamin A, C were common among thalassemia patients as only 30% were consuming fruits on daily basis. Conclusions: Most of the thalassemiacchildren were found to be malnourished due to inadequate dietary intake. The caregivers and parents should be counseled to create awareness

L Ow P Ower and a Rea E Fficient a Rchitecture D Esign for M Oderate R Ate D Igital S Ystems

Recent advancements in semiconductor technology have sparked a struggle among researchers and manufacturers to best utilize the modern technology trends in designing state of the art digital systems. Devices with small form factors, offering high throughput and low power consumption are very much in demand. These factors have actuated active research in the field of area efficient, low power high speed digital system design. This research is an effort to contribute in this active research area by adding a new dimension to digital design methodology. In addition to this, the research also makes use of established digital design methodologies augmented with the research studies outcome to produce novel designs around few exemplary applications. The prime focus of this study is to explore Trace Scheduling Methodology and extracts novel algorithm-to-hardware mapping features for efficient hardware design. Trace scheduling is a topic under compiler design theory and is efficiently used to design compliers for VLIW machines. The research, inspired by trace scheduling, introduces the concept of efficient hardware design through identification of traces in the algorithm and their mapping for optimal hardware affinity. The research work first investigates this concept on a relatively simpler design such as an FIR filter in order to establish a link between the two technology domains which are compiler theory and digital system design. Later, the devised methodology is applied on applications from machine vision and cryptography to design area efficient, low power, moderate data rate architectures. The research presents novel hardware mapping of Peak Sorter and AdvancedEncryption Standard (AES) algorithm for moderately high data rate applications. The designs offer a best area performance tradeoff. The utility of the technique developed in this research can be found in mapping complex algorithms in Very Large Scale Integrated (VLSI) circuits and digital design compilers