سیرت نبوی ﷺ کا اجتہادی پہلو

Establishment of khilafah and tamkeen fil ‘ard means supremacy of the dictates of shari‘ah and socio-political justice on earth. This is one of the basic objectives and prominent messages of the Holy Quran and Seerah of Prophet Muhammad (s.a.w). About khilafah and tamkeen fil ‘ard the Holy Quran expresses as:   -وَعَدَ اللَّهُ الَّذِينَ آمَنُوا مِنكُمْ وَعَمِلُوا الصَّالِحَاتِ لَيَسْتَخْلِفَنَّهُم فِي الأَرْضِ …  -الَّذِينَ إِن مَّكَّنَّاهُمْ فِي الأَرْضِ أَقَامُوا الصَّلاَةَ وَآتَوُا الزَّكَاةَ وَأَمَرُوا بِالمَعْرُوفِ وَنَهَوْا عَنِ المُنكَرِ وَلِلَّهِ عَاقِبَةُ الأُمُورِ.  -هُوَ الَّذِي أَرْسَلَ رَسُولَهُ بِالْهُدَى وَدِينِ الْحَقِّ لِيُظْهِرَهُ عَلَى الدِّينِ كُلِّهِ وَكَفَى بِاللَّهِ شَهِيداً.  Prophet Muhammad (s.a.w) proclaims:   - وَاَللَّهِ لَوْ وَضَعُوا الشَّمْسَ فِي يَمِينِي وَالْقَمَرَ فِي يَسَارِي عَلَى أَنْ أَتْرُكَ هَذَا الْأَمْرَ حَتَّى يُظْهِرَهُ اللَّهُ أَوْ أَهْلِكَ فِيهِ مَا تَرَكْتُهُ. The Holy Quran and the Seerah refer to some underlying milestones on the way of religious nations to status of khalafah and tamkeen fin ‘ard. These milestones may be expressed in an order as: da‘wah [preaching], deen [practices of prophetic teachings], hijrah [migration], ma‘iyyat-ul-Allah [companionship of Allah], qital [wars], nusrat-ul-Allah [divine aid], izhar-ud-deen [domination of deen] and khilafah [inheritance of authority]. This is noteworthy that journey of khalafah and tamkeen fin ‘ard begins with da‘wah [preaching towards deen] and passing through various milestones ends up again at da‘wah, as obvious from ayat-ul-istakhlaf quoted above. Therefore, the seekers of khilafah and tamkeen fil ‘ard should strive hard and keep struggling with the work of da‘wah with dedication in all circumstances and all means as per time and place requirements in lined with the modus operandi of Prophets, particularly Prophet Muhammad (s.a.w), instead of awaiting the status of khilafah and tamkeen fil ‘ard as prerequisite to start with the work of da‘wah and establishment of deen. This paper primarily aims to elaborate the milestones of Muslim Ummah to reach to the status of khilafah and tamkeen fil ‘ard. It also cast light on the objectives of khilafah and tamkeen fil ‘ard. This work provides useful guidance to Muslim Ummah in general and Ahlud da‘wah in particular about milestones and objectives of khilafah and tamkeen fil ‘ard.

Hardware Intrusion Detection Using Run-Time Parametric Analysis

The advancements in electronic systems and technology miniaturization have revolutionized the world in the last couple of decades. The higher complex ity of modern designs, economic constraints, and unprecedented pressure of time-to-market dictate the rationale of Integrated Circuit (IC) manufacturing from the third-party fabrication facilities. This rising trend of globalization in circuit design using nanoscale process technologies has increased their vulner ability against malicious intrusions and modifications. Such modifications, also referred as Hardware Trojans (HTs), can lead to highly detrimental con sequences like causing a circuit to subvert normal operation, leak sensitive information or inducing Denial of Service (DoS). These emerging issues are imposing formidable threats to security-critical applications particularly in the domains of military, communications, and Internet of Things (IoT). The conventional side channel analysis-based HT detection techniques mostly rely on simulations, which are typically exhaustive and computationally intensive. Moreover, it takes substantial resources and time for all-encompassing veri fication and analysis of the circuits. In this thesis, we apply the strengths of formal verification to complement simulation-based HT detection techniques by detailed behavioral analysis of circuits at the early stage of design. Formal methods are conclusive and well-established techniques which are used for description of complex sys vi vii tems in the form of mathematical models, and then use those models for rigorous analysis. In particular, we present a model checking-based formal framework that is broadly used to: (i) mathematically model an individual circuit for its functional and behavioral verification; (ii) analyze and quan tify vulnerability of a region in circuit against different types of HTs using multiple side-channel parameters; and (iii) identification of secure bounds for circuit operations in terms of its side-channel parameters. The outcome of the formal framework is used to design side channel-based sensor that comprehends the behavior of the circuit using a machine learning technique while incorporating the impacts of random process variations. The proposed framework serves to achieve the primary thesis goal of implanting intelligent sensor leveraging rigorous a-priori assessment of IC characteristics. The im plemented sensor can be subsequently used for post deployment identification of the HT-infected IC. To illustrate the practical effectiveness of the proposed infrastructure, we present the detailed analysis of multiple benchmark circuits. The formal framework and automated analysis technique, formulated during this thesis, proved effective in examining the impacts of malicious intrusions on multi ple side-channel parameters. Moreover, it provides flexibility in identifying the appropriate sensing units to incorporate security in the circuits while minimizing additional hardware.