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Android H Ealth Care System

Thesis Info

Author

Komal Sultana

Supervisor

Jawad Tanweer

Department

Department of Computer Science

Program

BCS

Institute

COMSATS University Islamabad

Institute Type

Public

City

Islamabad

Province

Islamabad

Country

Pakistan

Thesis Completing Year

2017

Thesis Completion Status

Completed

Subject

Computer Science

Language

English

Added

2021-02-17 19:49:13

Modified

2023-01-06 19:20:37

ARI ID

1676719802379

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زاہدہؔ صدیقی

                زاہدہؔ صدیقی(۱۹۴۷ء پ) کا قلمی نام زاہدہؔ ہے۔ آپ برہان پور پسرور میں پیدا ہوئیں۔ آپ معروف شاعر حفیظ صدیقی کی حقیقی بہن ہیں۔ آپ کا ابتدائی کلام ماہنامہ ’’تحریریں‘‘ میں چھپتا رہا۔ آپ ’’تحریریں‘‘ کی مدیر بھی رہیں۔ زاہدہؔ کے دو اردو شعری مجموعے ’’جاگتی آنکھوں کے خواب ‘‘اور ’’دعاؤں کا سائبان‘‘ شائع ہو چکے ہیں۔ اردو کے علاوہ آپ کے دو پنجابی شعری مجموعے بھی طبع ہو چکے ہیں۔(۱۰۳۷)

                زاہدہ صدیقی نے اپنی شاعری میں اپنی ذات کو عالمِ نسوانی کے ایک فرد کی علامت کی صورت میں پیش کیا ہے۔ ان کی شاعری اس لحاظ سے بہت خوشگوار ہے کہ انھوں نے اپنی ذات کو اپنے لیے مجلس نہیں بنایا بلکہ اس کی فصیلیں گرادی ہیں۔ اور اپنی شاعری کے ذریعے نوجوان شعرا کو تازہ ہوا اور کھلی دھوپ سے فیض ہو نے کا درس دیا ہے۔ رجائیت ،رومانیت اور عشقِ حقیقی زاہدہؔ کی شاعری کی خصوصیات ہیں ۔ ا س حوالے سے کچھ اشعار ملاحظہ ہوں:

ایک احساس

صبحِ اُمید کی جس کرن کے لیے

ہم سے پہلے بھی کچھ لوگ

تاریک راہوں پہ چلتے رہے

آج ہم بھی

انھی تیرہ و تار راہوں پر چلتے ہوئے

سوچتے ہیں

کہ شاید

کسی روز اپنا مقدر بنے

صبح اُمید کی وہ کرن

جو ابھی تک

نگاہوں سے مستور ہے(۱۰۳۸)

جاگتی آنکھوں کا خواب

زندگی

اک جاگتی آنکھوں کا خواب

خواب جو دیکھا نہ پہچانا گیا

ایک ساعت

آدمی کو اس کے ہونے کا یقین

دوسری ساعت

بکھر جائے فضاؤں میں کہیں

اک دریدہ لباس آوازِ جرس

جیسے اس کی کوئی منزل ہی نہیں (۱۰۳۹)

ترا خیال اُتارے دل و نظر کا غبار

 

ہر اک بجھی ہوئی صورت نکھر بھی سکتی ہے

...

ابن خرداذبہ اور ان كى كتاب المسالك والممالك: تاریخى وتنقیدى جائزہ

Ibn Khurdathba was a man with variable culture, he had an important role in the science of geography especially (knowing of the roads, locations of the cities, weather in addition to the news of general history and some arts like (music and singing )  The growth of Ibn Khurdathba in a family worked in the military field, close to the royal court has helped him to start his practical life early and allowed him also to contact with caliphs, ministers and writers in addition to occupying of the significant positions in the state, making it easier to get information from their original resources. Ibn Khurdathba has descended from Persian family lately entered into Islam۔ One of earliest geographical works of this period, his famous Kitab al- Masalik wa’l= Mamalik’. It gives a summary of the main trade routes of the Arab world and in addition provides description of such distant China, Korea and Japan. This article attempts his life and his “Al masalik wa al mamalik” book, varies sides.

Statistics-Inspired Hardware Architectures for Image and Video Processing

Conventional digital arithmetic circuits are designed to operate on a specified range of operand magnitudes. The architecture of these circuits is typically developed to improve the area time characteristics and obtain an energy efficient implementation operating at the desired throughput. Moreover, these circuits are required to provide full precision for the full dynamic range of operands and operate at the speed of worst case. Albeit the correctness of results is ensured, the input data statistics are not taken into account. Resultantly, redundant computations are performed since the information content of input data sequence in certain applications, such as image and video processing, is known to be much less than the simple binary descriptions used by the conventional arithmetic circuits. However, run time identification and exploitation of the latent redundancy in computations is non trivial owing to the diverse statistical nature of input data. Although efforts have been made in the past to design low power architectures by exploiting certain patterns in the magnitudes of the operands, few attempts have been made to improve logic area and processing time efficiency by harnessing the statistical properties of the inputs. It seems conducive to design application specific hardware that explicitly incorporates data statistics while computing and consequently saves precious computation cycles and or logic resources which are otherwise wasted in redundant computations. This thesis proposes hardware design approaches that utilize the inherent redundancy in input operands of image and video processing applications in the implementation of arithmetic circuits to achieve most economical tradeoffs between logic resources, processing time and results precision. Specifically, modifications and enhancements in conventional arithmetic hardware design approaches, namely Distributed Arithmetic, Sub- Expression Sharing, Fast FIR parallel filtering and Approximate Processing have been reported to further enhance their efficiency. Conventional Distributed Arithmetic approach to trade-off logic area with processing speed has been modified to include Memoization based Look Up Tables for storage of partial results from past computations. This modification harnesses bit level redundancies in input operands and leads to decrease in processing time on average while requiring a proportionately lesser increase in hardware resource requirements. The proposed approach has been used to implement Color Space Conversion module for incorporation as Instruction Set Architecture enhancement in open-source Intellectual Property Core for OR1200 32-bit processor. Similarly, conventional Sub-Expression Sharing and Fast FIR parallel filtering techniques to implement low complexity hardware structures have been modified to identify low entropy portions of operands for processing with reduced precision. The ensuing low complexity hardware structures depict negligible loss in output precision when used to process low entropy image data while saving precious logic resources in higher proportion. Merits of incorporating input data statistics in hardware design process have been further illustrated through low precision implementation of statistics-inspired circuits for computing Sum of Squared Error and Normalized Cross Correlation as error metric in template matching applications such as Motion Estimation and Disparity Estimation. The proposed low complexity designs process low and high entropy portions of the operands with appropriate logic efforts and perform better than conventional approximate processing circuits which use brute force quantization of operands as well as output results to reduce hardware complexity. The statistics-inspired hardware designs proposed in this thesis either achieve lower processing time using comparable logic resources or lower hardware cost with minimal impact on precision when compared with the conventional approaches. Efficacy of employing signal statistics information in hardware design process has been shown through proofs of logic resource savings in Field Programmable Gate Arrays based implementations and performance in several real-world applications. Up to 70% hardware savings with minimal impact on output precision in the design of Approximate Squarer and 50% reduction in computation times at full precision for Modified Distributed Arithmetic circuits have been achieved through application of the statistics-inspired hardware design approach.