When Comes such Another? Asma Jahangir 1952 –2018

On the 11th of February this year death vanquished Pakistan’s Asma Jahangir: Nothing else could. Her name will endure; yet one cannot go on to say “death thou art dead” for the vacuum in the field where this indomitable and intellectually gifted lawyer fought and won her battles for the forgotten and ignored, the resource-less, and – above all – for the politically and socially persecuted is felt more gravely with each passing day: Asma Jahangir was a convinced human rights activist. There are many such, but she was a uniquely effective and successful one.

Next Generation Energy Efficient Process Protocols in Si-Cmos Electronics

As Silicon CMOS manufacturing industry is possibly reaching to its climax with complex requirements posed by the International Technology Roadmap of Semiconductors; a “More Moore” approach is fully utilized to further exploit the Silicon Fabrication protocols. This goes hand in hand with other two process and design strategies, namely, “More than Moore” and “Beyond CMOS”. A 10 node technology, converging the chip fabrication processes between 10nm and 20nm, has been rigorously tested and revisited to look for complimentary solutions which are exploitable in variety of designs and processes in next generation technology nodes. The operational output characteristics of MOS/CMOS and its variant devices are being reassessed with a perspective of energy efficiency gained during the device design (inclusive of scaling requirements) and process development. This, in turn, influences the power consumption, proficiency of performance and reliability of the devices. Such energy efficient electronics has gained a huge interest due the evolution of Internet of Things (IoT) and its ultra-low power considerations. This study focuses on the energy efficient design and fabrication of Silicon CMOS/MOSCAP devices with a detailed electrical and electro-optical metrology. A FAB-specific MOSFET design (technology file), simulated output characteristics, half-of-FAB line processing of MOSCAP structure with integration of novel Atomic Layer Deposited TiN/HfSiOx metal gate/High-k stack and atomistic-layered PVD-driven Aluminium back-contact metallization is realized in this work. Energy efficiency is also studied through the concept of thermal budget by virtue of the dynamics of annealing which greatly influence the electrical properties of the gate stack and consequently the reliability of the process. Subsequent process characterization is performed using Current-Voltage, Capacitance-Voltage, Current Density, Leakage Resistance, Built-in Voltage, Doping Profiling, Charge-storage/ Permittivity, Hall Effect and Vertical Field analysis. Sophisticated metrology techniques such as Charge-Deep Level Transient Spectroscopy and Spectroscopic Ellipsometry are utilized to extract and evaluate the hypersensitive electrical and electro-optical parameters such as charge-transient behavior, activation energy, trap density, capture cross-section, refractive index, dielectric and extinction coefficients etc. Design verification through FAB-line processing, post-FAB thermal processing and variety of measurements revealed a number of interesting results which altogether provide a novel process window to engineer energy efficient electronics with a better trade-off. These results may have ramifications for device and process engineer.