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Reliability Assessment of Wide Band Gap Field Effect Transistors

Thesis Info

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Author

Saif Ur Rehman

Program

PhD

Institute

Capital University of Science & Technology

City

Islamabad

Province

Islamabad.

Country

Pakistan

Thesis Completing Year

2019

Thesis Completion Status

Completed

Subject

Engineering & Technology

Language

English

Link

http://prr.hec.gov.pk/jspui/bitstream/123456789/11535/1/Saif%20ur%20Rehman%20Electrical%20engg%202019%20cust%20isb%20prr.pdf

Added

2021-02-17 19:49:13

Modified

2024-03-24 20:25:49

ARI ID

1676727822019

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In 1st part of the thesis, an improved temperature dependent analytical model is presented for wide bandgap MESFETs output characteristics. The model involves self-heating effects, which is a common phenomenon in FETs meant to handle a relatively large current and exhibit negative conductance in their output characteristics. A comparative analysis of modeled and observed characteristics exhibited a significant improvement in the modeled data. In 2nd part, an analytical model is presented to assess Miller capacitors of FETs. Based on four distinct regions underneath the Schottky barrier gate of the device, analytical expressions are developed to assess Miller capacitors for both linear, as well as, for saturation regions of operation. It is shown that, relative to earlier reported models, the proposed technique exhibited a significant improvement in assessing the device Miller capacitors. In 3rd part, substrate effects on AC performance of wide bandgap FETs are discussed. A comparative analysis is established, which demonstrated that both Si and SiC substrates are equally good, and there is a nominal change in the AC performance of the device by changing the substrate from Si to SiC. Particle swarm optimization technique is used to achieve optimized intrinsic parameters by involving measured S-parameters. It is established that Si substrate, which is considerably cheaper than SiC, could comfortably be employed to fabricate submicron GaN HEMTs. Finally, 4th part of the thesis presents a nonlinear model to simulate the I −V characteristics of submicron SiC FETs. The region where the Schottky barrier gate loses its control on the channel current, because of the high biased, is successfully modeled for better understanding of the device operation. It is shown that the device performance drastically affected when transconductance to output conductance ratio is less than unity. By attaining accurate compliance between the observed and modeled output characteristics, even for those conditions where the channel is behaving erroneously, device AC parameters are extracted to predict the reliability of the device characteristics under intense operating conditions.
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