Asian Research Thesis Index

Abstract

The work presented in this thesis addresses the dynamical control systems regarding manufacturing, industrial processing and transportation, in local and distributed environment adapting simplified design techniques. This enhances the control strategies giving multi-agents based autonomous capabilities. A new design model of fuzzy logic discrete event (DEV) control system under time constrain is proposed and implemented for industrial applications. Three systems: grinding and mixing fuzzy logic time control system, liquids mixing fuzzy logic time control system, and multi- dimensional supervisory control industrial processing system using fuzzy time control are designed. In this regard, a simplified design approach is adapted to reduce the complexity of memory based fuzzy systems and to enhance the controllability and stability of the systems. Design of: fuzzifier, inference engine, rule base, deffuzifiers, and DEV control system, is discussed. Time control fuzzy rules are formulated, applied and tested using MATLAB simulation for the systems. The simulation results of each proposed application are found in agreement with the design based calculated results. For vehicles automation, multi-agents based autonomous railway vehicles control model is designed. In this regard, a new speed scheduling, management and control model is established to meet the requirements of modern autonomous train systems. This research work proposes to develop a novel control system to enhance the efficiency of the vehicles under constraints of various conditions: hard conditions; junction track condition, track clearance, and crossing gates condition, flexible conditions; environment monitoring, track condition, and tilting condition. Various development techniques to establish the multi-agents based autonomous railway vehicles control system are discussed and proposed for implementation using high tech microelectronics technology. The design and simulation work is carried out at the laboratories of GC University Lahore Pakistan, and The School of Electronics and Engineering-SEE, Edinburgh University U.K during research fellowship to work with system level integration group SLIg using MATLAB-simulink, and Xilinx 10.1 suit for ISE and DSP tools.

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